Fluctuations in Earth’s magnetic field that repeat every seven years can be used to probe the inner workings of our planet.

The Slow Mo Guys are known for their slow-motion videos, but this time they went to Caltech to utilize the world’s fastest camera. What exactly did they want to shoot? 10 trillion frames per second is the speed of light.
To put things in perspective, the cameras they routinely use, while excellent, are still 20 million times slower than this one from Caltech. They collaborated to try to capture the speed of light. The speeds are measured in picoseconds and femtoseconds. We can see why the Slow Mo Guys are ecstatic about their new initiative.
There’s been a lot of focus on how both Intel and AMD are planning for the future in packaging their dies to increase overall performance and mitigate higher manufacturing costs. For AMD, that next step has been V-cache, an additional L3 cache (SRAM) chiplet that’s designed to be 3D die stacked on top of an existing Zen 3 chiplet, tripling the total about of L3 cache available. Today, AMD’s V-cache technology is finally available to the wider market, as AMD is announcing that their EPYC 7003X “Milan-X” server CPUs have now reached general availability.
As first announced late last year, AMD is bringing its 3D V-Cache technology to the enterprise market through Milan-X, an advanced variant of its current-generation 3rd Gen Milan-based EPYC 7,003 processors. AMD is launching four new processors ranging from 16-cores to 64-cores, all of them with Zen 3 cores and 768 MB L3 cache via 3D stacked V-Cache.
AMD’s Milan-X processors are an upgraded version of its current 3rd generation Milan-based processors, EPYC 7003. Adding to its preexisting Milan-based EPYC 7,003 line-up, which we reviewed back in June last year, the most significant advancement from Milan-X is through its large 768 MB of L3 cache using AMD’s 3D V-Cache stacking technology. The AMD 3D V-Cache uses TSMC’s N7 process node – the same node Milan’s Zen 3 chiplets are built upon – and it measures at 36 mm², with a 64 MiB chip on top of the existing 32 MiB found on the Zen 3 chiplets.
Dr. Michio Kaku on what is likely and what is possible provides a stimulating vision of the future.
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